Configuracion de pines de LCD

Estas son algunas de las configuraciones de pines en los diferentes tipos de LCD que existen:

Estas configuraciones distintas responden a la misma función en sus pines numerados de la siguiente forma:

REQUERIMIENTOS DE SOFTWARE PARA EL LCD (PROGRAMACION)

A. INTRODUCTION
Software determines what, how and where data is displayed on the LCD. All Densitron character modules feature the Hitachi HD44780 or equivalent controller IC. This versatile chip features:

• Built-in character generator with 192 character modified ASCII character set.
• Ability to program up to 8 custom characters.
• Bi-directional 8 or 4 bit bus interface
• 80 character RAM
• Automatic reset on power up
• Wide range of instruction functions including:
  - Display clear, Cursor positioning, Display or cursor shift on data entry, and Display ON/OFF

Instructions are explained in detail on the following pages. 

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B. INITIALIZATION

The module has 2 registers; one for inputting instructions and one for reading or writing data. Instructions are used to tell the module how and where to put the data. If the rise time of the power supply meets the criteria below, the module will default to the following functions via an internal initialization routine:

Clear Display
Function Set	DL=1: 8 bits interface
	N=0: 1 line display
	F=0: 5×7 dot font
Dislay ON/OFF control	D=0: Display OFF
	C=0: Cursor OFF
	B=0: Blink OFF
Entry Mode Set	I/O=1: +1 increment
DD RAM is selected

The display will be busy for approximately 15mS after power ON.

Power Supply Timing Requirements for Internal Initialization

If power supply rise time cannot be assured of meeting the requirements above, or if different parameters are required (such as for a 2 line display), an initialization routine will have to be sent from the host. When first setting up the display, Densitron recommends the following initialization routines for 8 bit interfaces:

• 1 line display with 5×7 font:
  • 30, 30, 06, OE, 01 (hex)
• 1 line display with 5×10 font:
  • 34, 34 ,06 ,OE, 01 (hex)
• 2 line display with 5×7 font:
  • 38, 38, 06, OE, 01 (hex)

Wait states should be programmed to allow 15mS after power up before initialization begins. Waiting 4.1mS between the “3X” codes and 100S after the second “3X” code add a safety margin and ensure proper initialization.

After sending this routine, you should have a clear display with a flashing cursor in the upper left position. The cursor will then increment to the right with each data RAM write command. If, you do not have this display, see Troubleshooting Tips in the appendix. 

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C. 4-BIT OPERATION

The modules will operate from a 4-bit wide data bus. Data is transferred over data lines D7-D4. D3-D0 may float. 8-bit hex code is sent one nibble at a time, with the most significant nibble sent first. The function set in the initialization routine must change to accommodate this mode. A recommended initialization routine is as follows:

• 2 line display with 5×7 font:
  • 2, 8, 2, 8, 0, 6, 0, E, 0, 1(hex)

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D. DISPLAY ADDRESSING

The display RAM is 8 characters. If the display is less than 80 characters, what is on the screen is a “window” on the RAM. What is displayed depends on the Entry Mode Set instruction. Address diagrams on the next page show RAM addresses as they appear after a Clear Display or Return Home instruction, or when Entry Mode Set instruction S=0.

If a 2-line display has less than 40 characters per line, the cursor will advance off the screen after the last character of the first line. To put data on the secone line, a Set DD RAM Address instruction must be sent.

When instruction S=1, the display is shifted. This makes the characters look as though they are marching across the screen on entry. It also lets small displays (2x16s, for example) to have data stored in non-visible areas of the RAM and shifted in to view with one command. The last diagram shows how the addresses “wrap” in this mode.�

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E. SPECIALLY CODED DISPLAYS
Three types of displays have different addressing than typical 1 or 2 line displays. They are:

1. 1 chip 1 line by 16 character displays
2. 4 line by 16 or 20 character displays
3. 4 line b 40 character displays

1 chip 1×16 – The HD44780 has the ability to control up to 16 characters without any other driver ICs. A lower cost 1 line by 16 character display can be manufactured to take advantage of this feature. To do this, it is necessary to initialize the display in the 2 line mode. The display is then addressed as a 2 line display. Line 1 addresses the first 8 characters; line 2, the second 8. When the cursor gets to the ninth character of the first line, it will “disappear” into undisplayed RAM (assuming no display shift). A Set DD RAM Address must be sent to reposition the cursor to the ninth displayed character which is logically the first position of the second line.

——– 1 X 16 ———-

1 Chip 1×16 Addresses4×40 – The maximum capacity of the HD44780 is 80 characters. The 160 characters on the 4×40 displays are accessed with 2 controllers. The first controller handles the top two lines; the second controller is conected to the bottom two lines. They share all I/O lines except the “E”. Logically, the display is like two displays connected to the MPU as the “E” lines must be independent. Remember to turn off the cursor when moving from one half of the display to the other to avoid viewer distraction.

4×16/20 – Because of the way the controller and drivers are connected to make maximum use of their outputs, special attention must be paid to the addresses of these displays. Logically, line 3 follows line 1, and line 4 follows line 2. When the cursor gets to the end of line 1, it will jump to line 3. Keeping track of cursor location for proper positioning is important.

——– 4 X 16 ———-

4 Line by 16 Character Addresses——– 4 X 20 ———-

4 Line by 20 Character Addresses

4 Line by 40 Character Addresses

1 Line Display Addresses

2 Line Display Addresses

2 Line Display with Display Shifted Left (I/D=1, S=1. See Entry Mode Set Instruction)

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F. INSTRUCTION TABLE

Instruction	RS	R/W	DB7	DB6	DB5	DB4	DB3	DB2	DB1	DB0	Description	Execution Time (when Fcp or fosc is 250KHz)
Clear Display	0	0	0	0	0	0	0	0	0	1	Clears Display and returns cursor to the Home Position (Address 00)	80uS = 1.64mS
Return Home	0	0	0	0	0	0	0	0	1	*	Returns cursor to Home Position. Returns shifted display to original position. Does not clear display	40uS = 1.6mS
Entry Mode Set	0	0	0	0	0	0	0	1	I/D	S	Sets DD RAM counter to increment or decrement (I/D) Specifies cursor or display shift during to Data Read or Write (S)	40uS
Display ON/OFF Control	0	0	0	0	0	0	1	D	C	B	Sets Display ON/OFF (D), cursor ON/OFF (C), and blink character at cursor position	40uS
Cursor or Display Shift	0	0	0	0	0	1	S/C	R/L	*	*	Moves cursor or shifts the display w/o changing DD RAM contents	40uS
Function Set	0	0	0	0	1	DL	N	F	*	*	Sets data bus length (DL), # of display lines (N), and character font (F)	40uS
Set CG RAM Address	0	0	0	1	ACG						Sets CG RAM address. CG RAM data is sent and received after this instruction	40uS
Set DD RAM Address	0	0	1	ADD							Sets DD RAM address. DD RAM data is sent and received after this instruction	40uS
Read Busy Flag & Address	0	1	BF	AC							Reads Busy Flag (BF) and address counter contents	1uS
SIZE=2>Write Data from DD or CG RAM	1	0	Write Data								Writes data to DD or CG RAM and increments or decrements address counter (AC)	40uS
Read Data from DD or CG RAM	1	1	Read Data								Reads data from DD or CG RAM and increments or decrements address counter (AC)	40uS
I/D=1: Increment S=1: Display Shift on data entry S/C=1: Display Shift (RAM unchanged) R/L=1: Shift to the Right DL=1: 8 bits N=1: 2 Lines F=1: 5×10 Dot Font D=1: Display ON C=1: Cursor ON B=1: Blink ON BF=1: Cannot accept instruction				I/D=0: Decrements S=0: Cursor Shift on data entry S/C=0: Cursor Shift (RAM unchanged) R/L=0: Shift to the Left DL=0: 4 bits N=0: 1 Line F=0: 5×7 Dot Font D=0: Display OFF C=0: Cursor OFF B=0: Blink OFF BF=0: Can accept instruction							Definitions: DD RAM: Display data RAM CG RAM: Character generator RAM ACG: CG RAM Address ADD: DD RAM Address(Cursor Address) AC: Address Counter used for both DD and CG RAM Address	Execution Time changes when Frequency changes per the following example: If FCP or fosc is 27 KHz 40uS x 250/270 = 37uS

* Don’t Care 

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G. INSTRUCTION DESCRIPTION

CLEAR DISPLAY

RS	R/W	DB7							DB0
0	0	0	0	0	0	0	0	0	1

Writes space code “20″ (hexadecimal) into all the DD RAM addresses. The cursor returns to Address 0 (ADD=”80″) and display, if it has been shifted, returns to the original position. In other words, display disappears and the cursor goes to the left edge of the display (the first line if a 2 or 4 line display module is used).

RETURN HOME

CODE

RS	R/W	DB7							DB0
0	0	0	0	0	0	0	0	1	*

* Don’t Care

Returns the cursor to Address 0 (ADD=”80″) and display, if it has been shifted, to the original position. The DD RAM contents remain unchanged.

ENTRY MODE SET

CODE

RS	R/W	DB7							DB0
0	0	0	0	0	0	0	1	I/D	S

I/D: Increments (I/D=1) or decrements (I/D=0) the DD RAM address by one when writing or reading a character code from DD RAM. The cursor moves to the right when incremented by one. The same applies to writing and reading CG RAM.

S: Shifts the entire display to either the right or the left when S is 1; to the left when I/D=1 and to the right when I/D=0. Therefore, the cursor looks as if stood stil while only the display has moved. Display is not shifted when reading from DD RAM. Display is not shifted when S=0.

DISPLAY ON/OFF CONTROL

CODE

RS	R/W	DB7							DB0
0	0	0	0	0	0	1	D	C	B

D: Display is turned ON when D=1 and OFF when D=0. When display is turned off due to D=0, the display data remains in the DD RAM and it can be displayed immediately by setting D=1.
C: The cursor is displayed when C=1 and not displayed when C=0. Even if the cursor disappears, function of I/D, etc. does not change during display data write. The cursor is displayed using 5 dots in the 8th lines when the 5 x 7 dot character font is selected and in the 11th line when 5 x 10 dot character font is selected.
B: The character residing at the cursor position blinks when B=1. The blink is done by switching between all dots ON and display characters at 0.4 second interval. The cursor and the blink can be set concurrently.

CURSOR OR DISPLAY SHIFT

CODE

RS	R/W	DB7							DB0
0	0	0	0	0	1	S/C	R/L	*	*

* Don’t Care

Shifts the cursor position or display to the right or left without writing or reading the display data. This function is used for correction or search of display.

S/C	R/L
0	0	Shifts the cursor position to the left. (AC is decremented by one.)
0	1	Shifts the cursor position to the right. (AC is incremented by one).
1	0	Shifts the entire display to the left. The cursor follows the display shift.
1	1	Shifts the entire display to the right. The cursor follows the display shift.

FUNCTION SET

CODE

RS	R/W	DB7							DB0
0	0	0	0	1	DL	N	F	*	*

* Don’t Care

DL: Sets interface data length. Data is sent or received in 8 bit length (DB7-DB0) when DL=1 and 4 bit length (DB7-DB4) when DL=0. When 4 bit length is selected, data must be sent or received in 2 operations.
N: Sets number of display lines.
F: Sets character font.
(Together, N & F set the duty cycle).

SET CG RAM ADDRESS

CODE

RS	R/W	DB7							DB0
0	0	0	1	A	A	A	A	A	A

Sets the CG RAM address in a binary number of AAAAAA to the address counter, and data is written or read from the MPU related to the CG RAM after this. This is used for programming the Character Generator (CG) RAM.

SET DD RAM ADDRESS

CODE

RS	R/W	DB7							DB0
0	0	1	A	A	A	A	A	A	A

Sets the DD RAM address in a binary number of AAAAAAA in the address counter. Data is written or read from the MPU related to the DD RAM after this. When N=0 (1 line display), AAAAAAA is “00″ to “47″ (hexadecimal) When N=1 (2 line display),

AAAAAAA for the first line is “00″ to “27″ and “40″ to “67″, (hexadecimal) for the second line. Because the MSB is set to “!”, the hex codes are actually “80″ to “C0″, “80″ to “A7″, and “C0″ to “E7″ respectively. See Display Addressing for more information.

READ BUSY FLAG AND ADDRESS

CODE

RS	R/W	DB7							DB0
0	1	BF	A	A	A	A	A	A	A

When BF=1, the system is internally operating on a previously received instruction. The next instruction will not be received until BF=0. The value of the address counter also to read during this operation, and is given in binary AAAAAAA. Whether CG or DD RAM address is read is determined by the previous instruction.

WRITE DATA TO CG OR DD RAM

CODE

RS	R/W	DB7							DB0
1	0	D	D	D	D	D	D	D	D

Writes binary 8 bit data DDDDDDD to the CG or the DD RAM. Whether the CG or the DD RAM is to be written is determined by the previous designation (CG RAM address setting or DD RAM address setting). After write, the address is automatically incremented or decremented by one according to entry mode. Display shift also follows the entry mode.

READ DATA FROM CG OR DD RAM

CODE

RS	R/W	DB7							DB0
1	1	D	D	D	D	D	D	D	D

Reads binary 8 bit data DDDDDDD from the CG or the DD RAM. Whether the CG RAM or the DD RAM is to be read is determied by the previous designation. Prior to inputting this read instruction, either the CG RAM address set instruction or the DD RAM address set instruction must be executed. If it is not done, the first read data becomes invalid, and data of the next address is read normally from the second read. After read, the address is automatically incremented or decremented by one according to the entry mode. However, display shift is not performed regardless of entry mode types. 

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H. THE USE OF CG-RAM

Character Generator (CG) RAM is a useful accessory. It does not have to be used or attended to during any normal display operation. CG RAM allows the creation of up to 8 special character or symbols. Once programmed, the newly formed characters may be accessed as if they were in the “normal” CG ROM. This ROM contains 192 unchangeable characters. Thus the CG RAM expands the character representation available to the user.

NOTE: This is a RAM, and must be reprogrammed if display power is interrupted. If used regularly, programming can be made part of the initialization routine.

There are two distinct areas of RAM within the display module. The main area, 80 bytes wide, is dedicated to the display and is called Display Data (DD) RAM. CG RAM consists of 64 bytes which range from 40 to 7F (hex), or 4 5×10 (or 5×11) symbols. 40-47 locate the first, custom 5×7 character. 40 is the top row of this character, 47 is the 8th row. Similarly, 48-4F locate the second CG character, and 78-7F locate the 8th custom character. The locations 40-7F are the CG “Programming” locations only! Once programmed, these special characters are displayed by writing to character font locations 00-07 (hex). 00 will retun that character residing in locations 40-47, 01 returns 48-4F. etc. (See Font Chart).

While the CG RAM byte is 8 bits wide, only the 5 least significant bits appear on the LCD. Thus D4 represents the left-most dot and D0 the right-most dot. To illustrate, loading a CG RAM byte with 1F turns all dots in that row on; loading a byte with 00 turns all dots off. All 7 or 8 rows must be programmed at each desired CG location.

Programming procedure is:
a) with RS=0 enter the address of the top row of the character to be programmed (i.e. 40,48,50, etc.)
b) with RS=1 enter pattern data for row 1 (top row)
c) continue to enter pattern data for rows 2-8; it is not necesary to enter additional addresses if the module has been initialized with command 06 (auto increment of cursor).
This procedure may be continued until all CG bytes have been loaded.

The CG RAM can create an attractivew, “reverse-video” 3 x 5 pattern. Numerals look especially good in this format. Most letters can be executed. The limitation of 8 characters can be circumvented by creating a “library” of custom symbols, each totalling 8, resident in the host system. Eight custom symbols can be displayed at any ONE time. The CG RAM can be periodically reloaded as display requirements change. If you reload a CG location which is currently on the display, the change will be immediately apparent. Displays employing multiple controllers (ie. 4 x 40, 2 x 80. 4 x 80) may create 8 symbols per controller. The CG RAM adds interest and flexibility to the LCD module.

CG RAM, DD RAM, and pattern examples for 5 x 7 Dot Character patterns

Character Codes (DD RAM Data)	CG RAM Address	Character Patterns (CG RAM Data)
7 6 5 4 3 2 1 0 <<Higher order bits Lower order bits >>	5 4 3 2 1 0 <<Higher order bits Lower order bits >>	7 6 5 4 3 2 1 0 <<Higher order bits Lower order bits >>
0 0 0 0 * 0 0 0	0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 1 0 0 0 0 0 1 1 0 0 0 1 0 0 0 0 0 1 0 1 0 0 0 1 1 0 0 0 0 1 1 1	* * * 1 1 1 1 0 * * * 1 0 0 0 1 * * * 1 0 0 0 1 – Character * * * 1 1 1 1 0 – Pattern * * * 1 0 1 0 0 – Example (1) * * * 1 0 0 1 0 * * * 1 0 0 0 1 * * * 0 0 0 0 0 – Cursor Position
0 0 0 0 * 0 0 1	0 0 1 0 0 0 0 0 1 0 0 1 0 0 1 0 1 0 0 0 1 0 1 1 0 0 1 1 0 0 0 0 1 1 0 1 0 0 1 1 1 0 0 0 1 1 1 1	* * * 1 0 0 0 1 * * * 0 1 0 1 0 * * * 1 1 1 1 1 – Character * * * 0 0 1 0 0 – Pattern * * * 1 1 1 1 1 – Example (2) * * * 0 0 1 0 0 * * * 0 0 1 0 0 * * * 0 0 0 0 0 – Cursor position
0 0 0 0 * 0 1 0	0 1 0 0 0 0 0 1 0 0 0 1	* * * 1 0 0 0 1 * * * 1 1 0 1 1
0 0 0 0 * 1 1 1	1 1 1 1 0 1 1 1 1 1 1 0 1 1 1 1 1 1	* * * 0 0 1 0 0 – Character Pattern * * * 0 1 0 1 0 – Example (8) * * * 1 1 0 1 1 – Cursor position

*Don’t Care

Notes:

1. Character code bits 0-2 correspond to CG RAM address bits 3-5 for a total of 8 patterns.
2. CG RAM address codes 0-2 designate character pattern line. The 8th line is the cursor position. It is logically “OR’ed” with the cursor instruction.
3. Character patterns are loaded into CG RAM data bits 0-4 as shown in the table. (Bit 4 is the left side). Since CG RAM bits 5-7 are not used, they may be used for general data RAM.
4. CG RAM patterns are displayed on the LCD when character code bits 4-7 are all “0″. Bit 3 is a don’t care bit. Therefore, character pattern (1) can be selected with character code “00″ or “08″ (hexadecimal).
5. “1″ in the character pattern turn a dot “ON”. “0″ indicates a non-selected dot.

CG RAM, DD RAM, and pattern examples for 5 x 10 Dot Character patterns

Character Codes (DD RAM Data)	CG RAM Address	Character Patterns (CG RAM Data)
7 6 5 4 3 2 1 0 <<Higher order bits Lower order bits >>	5 4 3 2 1 0 <<Higher order bits Lower order bits >>	7 6 5 4 3 2 1 0 <<Higher order bits Lower order bits >>
0 0 0 0 * 0 0 *	0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 1 0 0 0 0 0 1 1 0 0 0 1 0 0 0 0 0 1 0 1 0 0 0 1 1 0 0 0 0 1 1 1 0 0 1 0 0 0 0 0 1 0 0 1 0 0 1 0 1 0 0 0 1 0 1 1 0 0 1 1 0 0 0 0 1 1 0 1 0 0 1 1 1 0 0 0 1 1 1 1	* * * 0 0 0 0 0 * * * 0 0 0 0 0 * * * 1 0 1 1 0 * * * 1 1 0 0 1 – Character * * * 1 0 0 0 1 – Pattern * * * 1 0 0 0 1 – Example (1) * * * 1 1 1 1 0 * * * 1 0 0 0 0 * * * 1 0 0 0 0 * * * 1 0 0 0 0 * * * 0 0 0 0 0 – Cursor Position * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
0 0 0 0 * 0 1 *	0 1 0 0 0 0 0 1 0 0 0 1	* 0 1 0 0 0 0 * * 0 1 0 0 0 1 *
0 0 0 0 * 1 1 *	1 1 1 1 0 1 1 1 1 1 1 0 1 1 1 1 1 1	* * * * * * * * – Character * * * * * * * * – Pattern * * * * * * * * – Example (4)

*Don’t Care�
Fuente : http://usuarios.multimania.es/Marciano2000/LCD.html

2 x 402 x 242 x 202 x 162 x 88182838485868788898A8B8C8D8E8F909192939495969798…A6A780C1C2C3C4C5C6C7C8C9CACBCCCDCECFD0D1D2D3D4D5D6D7D8…E6E7C02 x 402 x 242 x 202 x 162 x 8808182838485868788898A8B8C8D8E8F9091929394959697…A5A6A7C0C1C2C3C4C5C6C7C8C9CACBCCCDCECFD0D1D2D3D4D5D6D7…E5E6E7—– Complete RAM Addresses —–1 x 401 x 241 x 201 x 161 x 8808182838485868788898A8B8C8D8E8F9091929394959697…A5A6A7…C5C6C7Line1808182838485868788898A8B8C8D8E8F9091929394959697…A5A6A7Line2C0C1C2C3C4C5C6C7C8C9CACBCCCDCECFD0D1D2D3D4D5D6D7…E5E6E7Line3808182838485868788898A8B8C8D8E8F9091929394959697…A5A6A7Line4C0C1C2C3C4C5C6C7C8C9CACBCCCDCECFD0D1D2D3D4D5D6D7…E5E6E7808182838485868788898A8B8C8D8E8F90919293C0C1C2C3C4C5C6C7C8C9CACBCCCDCECFD0D1D2D39495969798999A9B9C9D9E9FA0A1A2A3A4A5A6A7D4D5D6D7D8D9DADBDCDDDEDFE0E1E2E3E4E5E6E7808182838485868788898A8B8C8D8E8FC0C1C2C3C4C5C6C7C8C9CACBCCCDCECF909192939495969798999A9B9C9D9E9FD0D1D2D3D4D5D6D7D8D9DADBDCDDDEDF8081828384858687C0C1C2C3C4C5C6C7